ArchC01-基本语法

2021-03-10

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ArchC介绍

官网 www.archc.org
Architecture Description Language
ArchC is a powerful and modern open-source architecture description language designed at University of Campinas by the ArchC team in the Computer Systems Laboratory, Institute of Computing.

基本语法

Architecture Resources Description (架构资源描述)

AC_ARCH: An architecture resource description always starts with this keyword.The designer should provide the model’s name (e.g. powerpc).
架构源描述总是从关键字 AC_ARCH 开始
ac_wordsize: Declares the size of the processor’s word in number of bits.
声明处理器一个字的位数
ac_regbank: Declares the register bank and its number of registers (e.g. the GPR bank has 32 registers).
声明寄存器bank和寄存器数量
ac_reg: Declares a single register (e.g. MSR).
声明单独寄存器
ac_mem: Declares a memory of a given size (e.g. MEM has 8 megabytes). The size can be expressed in bytes (no unit abbreviation needed), in kilobytes (K or k), in megabytes (M or m), or in gigabytes (G or g).
声明给出尺寸的内存，尺寸可以用byte/k/m/g表示
ac_tlm_port: Declares an external TLM communication port. It is followed by the name of that port object, a colon, and the size of its address space. This size, just like in ac_mem, may be expressed either in bytes or its multiples.
声明外部TLM通信端口
ac_tlm_intr_port: Declares an interrupt TLM communication port, followed by the port object name.
声明中断TLM通信端口
ARCH_CTOR: Initializes the AC_ARCH constructor declaration.
初始化AC_ARCH构造器声明
ac_isa: Informs the name of the file containing the AC_ISA description (e.g. powerpc_isa.ac) attached to this architecture description.
声明包含相关指令ISA描述的文件名，
set_endian: Defines the architecture’s endianness as “big” or “little”.
定义架构的大小端

AC_ARCH(armv7a)
{
    ac_wordsize 32;
    ac_mem Fetch(32, 32, little, 1);
    ac_mem Mem(32, 32, little, 0);
    ac_mem UserMem(32, 32, little, 0);
    ARCH_CTOR(armv5e) 
    {
        ac_isa("armv7a_isa.ac");
        set_endian("little");
    };
}

Instruction Set Architecture Description (指令集架构描述)

AC_ISA: An ISA description always starts with this keyword. The designer should provide the model’s name (e.g. powerpc in Fig. 2.6, Line 1; sparcv8 in Fig. 2.7, Line 1).
ISA描述总是从这个关键字开始，设计者应该提供模块名
ISA_CTOR: It merely initializes the AC_ISA constructor declaration.
仅仅初始化 AC_ISA 构造器声明
ac_format: It declares an instruction format and its fields. ArchC provides an additional construct that allows fields to overlap. It can be used to facilitate the description of complex instruction set. The declaration of alternative field choices starts with a square bracket (“[”). Additional groups are given after a vertical bar (“|”). When all alternatives are declared, a closing square bracket (“]”) ends the declaration. It should be noted that ArchC decodes all overlapping fields. However, although they can be accessed independently, not all are simultaneously valid. The designer has to define which alternative group is valid according to the value of some other field.
声明指令格式和领域，ArchC提供了额外的允许字段重叠的构造器，它可以被用来促进描述复杂的指令集。可选区域选择的定义从”[“开始，额外的组在”|”后被给出，当所有可选被声明，用”]”结束声明。注意ArchC解码所有的重叠区域，然而，尽管它们可以被独立访问，也不是所有的同时有效。设计者必须根据其他一些区域的变量定义哪个可选的组是有效的
ac_instr: It declares an instruction and ties it to a predefined format. Formats are assigned to instructions using a syntax similar to C++ templates.
声明了指令并且把它和其他预定义的格式绑在一起，绑定格式的语法类似C++的模板
set_decoder: It initializes the instruction decoding sequence, which is a key element to the automatic generation of an instruction decoder for the executable processor model. The sequence is composed of pairs <field_name = value>. Now, let us address the keywords that define symbolic names for instructions, registers and groups of instructions, since they are the key to the automatic generation of binary utilities (e.g. assemblers).
初始化指令解码段，是一个为可执行处理器模型自动生成指令解码的关键元素。这个片段由这个对组成，我们定位到定义指令、寄存器、指令组的关键字，因为它们都是自动生成二进制公共部分的关键。
ac_asm_map: Specifies a mapping between assembly symbols and values.
指定汇编标志和变量之间的映射，定义寄存器名集合和它们在寄存器bank种相应的数字
set_asm: Associates an assembly syntax string and operand encoding to an instruction. The syntax of this construct is similar to the printf family used in the C language. Literal characters must be matched as it appears in the assembly source program, while conversion specifiers (%) force the assembler to recognize ranges of values or symbols for operands. For each operand, there must be an associated instruction field, specifying the operand encoding (e.g. in Fig. 2.6, Line 19, the add instruction uses three operands of type reg with are associated, respectively, with the fields rt, ra, and rb of the format declared in Line 4).
联系汇编语法字符串和操作数编码到一个指令，这个构造类似C语言里printf。语法字母必须匹配汇编源文件程序，转换符%为操作数强制汇编识别标志、操作符。对于每一个操作数，必须由一个联系的指令区域，指定操作数编码
pseudo_instr: Describes a pseudo instruction in terms of previously described instructions.
根据之前描述过的指令描述伪指令

AC_ISA ( powerpc ) {
    ac_format I1 = "%opcd:6 %li:24:s %aa:1 %lk:1";
    ac_format B1 = "%opcd:6 %bo:5 %bi:5 %bd:14:s %aa:1 %lk:1";
    ac_format XO1 = "%opcd:6 %rt:5 %ra:5 %rb:5 %oe:1 %xos:9 %rc:1";
    ac_format SC1 = "%opcd:6 0x00:5 0x00:5 0x00:4 %lev:7 0 x00:3 0x01:1 0x00:1";
    ac_instr <I1 > b,ba,bl,bla;
    ac_instr <B1> bc,bca,bcl,bcla;
    ac_instr <XO1> add,add_,adc,mullw,divw,subf;
    10 ac_instr <SC1> sc;
    ac_asm_map reg {
        "" [0..31] = [0..31];
    }

    ISA_CTOR ( powerpc ) {

        add.set_asm ("add %reg, %reg, %reg", rt , ra , rb);
        add.set_decoder ( opcd =31 , oe =0 , xos =266 , r c =0);

        bca.set_asm ("bca %imm, %exp, %addr(pcrel)",bo,bi,bd) ;
        bca.set_decoder ( opcd =16 , aa =1 , lk =0);

        lmw.set_asm ("lmw %reg, %imm (%reg)",rt,d,ra);
        lmw.set_asm ("lmw %reg, %exp@l(%reg)",rt,d,ra);
        lmw.set_decoder ( opcd =46);

        sth.set_asm ("sth %reg, %imm (%reg)",rs ,d,ra);
        sth.set_asm ("sth %reg, %exp@l(%reg)",rs ,d,ra);
        sth.set_decoder ( opcd =44);
        ...
        pseudo_instr ("mr %reg, %reg") {
        "or %0, %1, %1" ;
        }
    } ;
}

Instruction Behavior Description (指令行为描述)

In ArchC descriptions, instruction behavior methods are actually written in pure SystemC/C++ code, thereby avoiding that users should learn additional keywords.
通常用SystemC写

参考资料

Electronic System Level Design: An Open-Source Approach

本文作者： Zheng Yuchen
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